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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
September 2008
FAN2108 -- TinyBuckTM
3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Features
Wide Input Voltage Range: 3V-24V Wide Output Voltage Range: 0.8V to 80% VIN 8A Output Current Programmable Frequency Operation: 200KHz to 600KHz Over 95% Peak Efficiency Integrated Schottky Diode on Low-side MOSFET Boosts Efficiency Internal Bootstrap diode Power-Good Signal Pre-Bias Startup Accepts Ceramic Capacitors on Output External Compensation for Flexible Design Input Under-Voltage Lockout Programmable Current Limit Under-Voltage, Over-Voltage, and Thermal Shutdown Protections Internal Soft-Start 5x6mm, 25-Pin, 3-Pad MLP Package
Description
The FAN2108 TinyBuckTM is a highly efficient, small footprint, 8A, synchronous buck regulator. The FAN2108 contains both synchronous MOSFETs and a controller/driver with optimized interconnects in one package, which enables designers to solve highcurrent requirements in a small area with minimal external components. External compensation, programmable switching frequency, and current limit features allow design optimization and flexibility. The summing current mode modulator uses lossless current sensing for current feedback and over-current protection. Voltage feedforward helps operation over a wide input voltage range. Fairchild's advanced BiCMOS power process, combined with low-RDS(ON) internal MOSFETs and a thermally efficient MLP package, provide the ability to dissipate high power in a small package. Output over-voltage, under-voltage, and thermal shutdown protections help protect the device from damage during fault conditions. FAN2108 prevents prebiased output discharge during startup in point-of-load applications.
Applications
Servers Point-of-Load Regulation High-End Computing Systems Graphics Cards Battery-Powered Equipment Set-Top Boxes
Ordering Information
Part Number
FAN2108MPX FAN2108EMPX
Operating Temperature Range
-10C to 85C -40C to 85C
Package
Molded Leadless Package (MLP) 5x6mm Molded Leadless Package (MLP) 5x6mm
Eco Status
Green Green
Packing Method
Tape and Reel Tape and Reel
For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
www.fairchildsemi.com
FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Application
Figure 1. Typical Application Diagram
Block Diagram
Figure 2. Block Diagram
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Pin Configuration
Figure 3. MLP 5x6mm Pin Configuration (Bottom View)
Pin Definitions
Pin #
P1, 6-12 P2, 2-5 P3, 21-23 1 13 14 15 16 17 18 19 20 24 25
Name
SW VIN PGND BOOT PGOOD EN VCC AGND ILIM R(T) FB COMP NC RAMP
Description
Switching Node. Power Input Voltage. Connect to the main input power source. Power Ground. Power return and Q2 source. High-Side Drive BOOT Voltage. Connect through capacitor (CBOOT) to SW. The IC includes an internal synchronous bootstrap diode to recharge the capacitor on this pin to VCC when SW is LOW. Power-Good Flag. An open-drain output that pulls LOW when FB is outside a 10% range of the reference. PGOOD does not assert HIGH until the fault latch is enabled. ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the regulator after a latched fault condition. This input has an internal pull-up when the IC is functioning normally. When a latched fault occurs, EN is discharged by a current sink. Input Bias Supply for IC. The IC's logic and analog circuitry are powered from this pin. Analog Ground. The signal ground for the IC. All internal control voltages are referred to this pin. Tie this pin to the ground island/plane through the lowest impedance connection. Current Limit. A resistor (RILIM) from this pin to AGND can be used to program the currentlimit trip threshold lower than the default setting. Oscillator Frequency. A resistor (RT) from this pin to AGND sets the PWM switching frequency. Output Voltage Feedback. Connect through a resistor divider to the output voltage. Compensation. Error amplifier output. Connect the external compensation network between this pin and FB. No Connect. This pin is not used. Ramp Amplitude. A resistor (RRAMP) connected from this pin to VIN sets the ramp amplitude and provides voltage feedforward functionality.
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Parameter
VIN to PGND VCC to AGND BOOT to PGND BOOT to SW SW to PGND All other pins ESD Continuous AGND=PGND
Conditions
Min.
Max.
28 6 35
Unit
V V V V V V V kV
-0.3 -0.5 -5 -0.3 Human Body Model, JEDEC JESD22-A114 Charged Device Model, JEDEC JESD22-C101 2 2.5 Transient (t < 20ns, f < 600KHz)
6.0 24.0 30 VCC+0.3
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC VIN TA TJ f
Parameter
Bias Voltage Supply Voltage Ambient Temperature Junction Temperature Switching Frequency
Conditions
VCC to AGND VIN to PGND FAN2108MPX FAN2108EMPX
Min.
4.5 3 -10 -40
Typ.
5.0
Max.
5.5 24 +85 +85 +125 600
Unit
V V C C C kHz
Thermal Information
Symbol
TSTG TL TVP TI JC J-PCB PD Storage Temperature Lead Soldering Temperature, 10 Seconds Vapor Phase, 60 Seconds Infrared, 15 Seconds P1 (Q2) Thermal Resistance: Junction-to-Case P2 (Q1) P3 Thermal Resistance: Junction-to-Mounting Surface Power Dissipation, TA=25C
(1) (1)
Parameter
Min.
-65
Typ.
Max.
+150 +300 +215 +220
Unit
C C C C C/W C/W C/W C/W
4 7 4 35 2.8
W
Note: 1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 24. Actual results are dependent on mounting method and surface related to the design.
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Electrical Specifications
Electrical specifications are the result of using the circuit shown in Figure 1 unless otherwise noted.
Symbol
Power Supplies ICC VCC Current
Parameter
Conditions
SW=Open, FB=0.7V, VCC=5V, fSW =600KHz Shutdown: EN=0, VCC=5V Rising VCC Hysteresis RT=50K RT=24K
Min.
Typ. Max. Unit
8 7 4.1 4.3 300 255 540 300 600 50
12 10 4.5
mA A V mV
VUVLO Oscillator f tON VRAMP tOFF Reference VFB
VCC UVLO Threshold
Frequency Minimum On-Time
(2)
345 660 65
KHz KHz ns V
Ramp Amplitude, peak-to-peak Minimum Off-Time
(2)
16VIN, 1.8VOUT, RT=30K, RRAMP=200K
0.53 100 150 806 805
ns mV mV dB MHz
Reference Voltage (see Figure 4 for Temperature Coefficient)
(2) (2)
FAN2108MPX, 25C FAN2108EMPX, 25C
794 795 80
800 800 85 15
Error Amplifier G BW VCOMP ISINK ISOURCE IBIAS DC Gain Gain Bandwidth Product Output Voltage Output Current, Sourcing Output Current, Sinking FB Bias Current VCC=5V, VCOMP=2.2V VCC=5V, VCOMP=1.2V VFB=0.8V, 25C RILIM Open at 25C (see Circuit Description) VCC=5V 12 0.4 1.5 0.8 -850 2.2 1.2 -650 -450
3.2
V mA mA nA
Protection and Shutdown ILIM IILIM TTSD THYS VOVP VUVLO VFLT VFLT_HYS Soft-Start tSS tEN VOUT to Regulation (T0.8) Fault Enable/SSOK (T1.0) Frequency=600KHz 5.3 6.7 ms ms Current Limit ILIM Current Over-Temperature Shutdown Over-Temperature Hysteresis Over-Voltage Threshold Under-Voltage Shutdown Fault Discharge Threshold Fault Discharge Hysteresis Internal IC Temperature Two Consecutive Clock Cycles 16 Consecutive Clock Cycles Measured at FB Pin Measured at FB Pin (VFB ~500mV) 110 68 12 -11 15 -10 +155 +30 115 73 250 250 121 78 18 -9 A A C C %VOUT %VOUT mV mV
Note: 2. Specifications guaranteed by design and characterization; not production tested.
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Electrical Specifications (Continued)
Recommended operating conditions are the result of using the circuit shown in Figure 1 unless otherwise noted.
Symbol
Control Functions VEN_R VEN_HYS REN IEN RFB VPG VPG_L
Parameter
EN Threshold, Rising EN Hysteresis EN Pull-Up Resistance EN Discharge Current FB OK Drive Resistance PGOOD Threshold PGOOD Output Low FB < VREF FB > VREF IOUT < 2mA
Conditions
Min. Typ. Max.
1.35 250 800 2.00
Unit
V mV K A
Auto-Restart Mode -14 +7
1 800 -11 +10 -8 +13.5 0.4
%VREF V
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Characteristics
1.010 1.005 V FB 1.000 0.995 0.990 -50 0 50 Temperature (oC) 100 150
1.20 1.10 I FB 1.00 0.90 0.80 -50 0 50 Temperature (oC) 100 150
Figure 4. Reference Voltage (VFB) vs. Temperature, Normalized
Figure 5. Reference Bias Current (IFB) vs. Temperature, Normalized
1500 1200 900 600 300 0 0 20 40 60 80 100 120 140 RT (K)
1.02 1.01 Frequency
Frequency (KHz)
600KHz
1.00
300KHz
0.99 0.98 -50 0 50 Temperature ( C)
o
100
150
Figure 6. Frequency vs. RT
Figure 7.
Frequency vs. Temperature, Normalized
1.4
1.04 1.02
1.2
RDS
1
Q1 ~0.32%/C Q2 ~0.35%/C
I ILIM
1.00 0.98 0.96
0.8
0.6 -50
0
50
100
150
-50
0
50 Temperature ( C)
o
100
150
Temperature (C)
Figure 8. RDS vs. Temperature, Normalized (VCC=VGS=5V)
Figure 9.
ILIM Current (IILIM) vs. Temperature, Normalized
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Application Circuit
Figure 10. Application Circuit: 1.8VOUT, 500KHz
Typical Performance Characteristics
Typical operating characteristics using the circuit shown in Figure 10. VIN=12V, VCC=5V, unless otherwise specified.
Efficiency @ Vo=1.8V, fsw=500KHz, Ta=25 C 95 90
0
Efficiency @ Vo=3.3V, fsw=300KHz, Ta=25 C 100 95 Efficiency (%) 90 85 80 75
Vin=5V Vin=10V Vin=12V Vin=14V Vin=20V
0
Efficiency (%)
85
Vin=8V
80 75 70 0 2
Vin=12V Vin=16V Vin=20V Vin=24V
4
Load Current (A)
6
8
70 0 2 4 Load Current (A) 6 8
Figure 11.
1.8VOUT Efficiency Over VIN vs. Load
Efficiency@ Vin=12V, Vo=1.8V
Figure 12. 3.3VOUT Efficiency Over VIN vs. Load
Load Regulation @ Vo=0.8V, 500kHz, 25C
95 Efficiency (%) 90 85 80 75 70 0 1 2 3 4 5 6 7 8 Load Current (A)
300KHz 500KHz 600KHz
Output Voltage (V)
0.8012 0.801 0.8008 0.8006 0.8004 0.8002 0.8 0.7998 0.7996 0.7994 0.7992 0 1
Vin=8V Vin=12V Vin=16V Vin=20V Vin=24V
2
3
4 Load Current (A)
5
6
7
8
Figure 13. 1.8VOUT Efficiency Over Frequency vs. Load
Figure 14. 0.8VOUT Load Regulation Over VIN vs. Load
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Typical operating characteristics using the circuit shown in Figure 10. VIN=12V, VCC=5V, unless otherwise specified.
VOUT
VOUT
SW PGOOD EN EN
Figure 15. Startup, 3A Load
Figure 16. Startup with 1V Pre-Bias on Vout
VOUT PGOOD EN
SW
EN
Figure 17. Shutdown, 1A Load
Figure 18.
Restart on Fault
HS and LS MOSFET Temperature
VOUT
T emp e ra tu re ( C)
90 80 70 60 50 40 30 20 0 2 4
Load Current (A)
LSFET@ 20Vin LSFET@ 12Vin HSFET@ 20Vin HSFET@ 12Vin
IOUT
6
8
Figure 19. Transient Response, 2-8A Load
Figure 20. MOSFET Temperature - Still Air at Room Temperature
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Circuit Description
Initialization
Once VCC exceeds the UVLO threshold and EN is HIGH, the IC checks for an open or shorted FB pin before releasing the internal soft-start ramp (SS). If R1 is open (Figure 1), the error amplifier output (COMP) is forced LOW and no pulses are generated. After the SS ramp times out (T1.0), an under-voltage latched fault occurs. If the parallel combination of R1 and RBIAS is 1K, the internal SS ramp is not released and the regulator does not start.
Soft-Start
Once internal SS ramp has charged to 0.8V (T0.8), the output voltage is in regulation. Until SS ramp reaches 1.0V (T1.0), the fault latch is inhibited. To avoid skipping the soft-start cycle, it is necessary to apply VIN before VCC reaches its UVLO threshold. Soft-start time is a function of oscillator frequency.
EN 1.35V
2400 CLKs
Bias Supply
The FAN2108 requires a 5V supply rail to bias the IC and provide gate-drive energy. Connect a 1.0f X5R or X7R decoupling capacitor between VCC and PGND. Since VCC is used to drive the internal MOSFET gates, supply current is frequency and voltage dependent. Approximate VCC current (ICC) is calculated by:
FB
1.0V 0.8V
0.8V
Fault Latch Enable
SS
3200 CLKs
ICC ( mA ) = 4.58 + [(
VCC - 5 + 0.013 ) * (f - 128)] 227
(1)
T0.8
4000 CLKs
where frequency (f) is expressed in KHz.
Enable
FAN2108 has an internal pull-up to enable pin so that the IC is enabled once VCC is applied. Connecting a small capacitor across EN and AGND delays the rate of voltage rise on the EN pin. EN pin also serves for the restart whenever a fault occurs (refer to the AutoRestart section). For applications where sequencing is required, FAN2108 can be enabled (after the VCC comes up) with external control, as shown in Figure 20.
FAN2108
T1.0
Figure 21. Soft-Start Timing Diagram
The regulator does not allow the low-side MOSFET to operate in full synchronous rectification mode until internal SS ramp reaches 95% of VREF (~0.76V). This helps the regulator to start on a pre-biased output and ensures that inductor current does not "ratchet" up during the soft-start cycle. VCC UVLO or toggling the EN pin discharges the SS and resets the IC.
14 EN
Setting the Output Voltage
The output voltage of the regulator can be set from 0.8V to 80% of VIN by an external resistor divider (R1 and RBIAS in Figure 1). The internal reference is 0.8V with 650nA, sourced from the FB pin to ensure that, if the pin is open, the regulator does not start. The external resistor divider is calculated using: V - 0.8V 0.8V = OUT + 650nA RBIAS R1 Connect RBIAS between FB and AGND. (3)
3.3n
Figure 20. Enabling with External Control
Setting the Frequency
Oscillator frequency is determined by an external resistor, RT, connected between the R(T) pin and AGND. Resistance is calculated by:
RT (K ) = (10 6 / f ) - 135 65
(2)
where RT is in K and frequency (f) is in KHz. The regulator cannot start if RT is left open.
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0 www.fairchildsemi.com 10
FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Calculating the Inductor Value
Typically the inductor is set for a ripple current (IL) of 10% to 35% of the maximum DC load. Regulators requiring fast transient response use a value on the high side of this range; while regulators that require very low output ripple and/or use high-ESR capacitors restrict allowable ripple current.
VOUT * (1 VOUT ) VIN IL * f
The over-current protection fault latch is active during the soft-start cycle. Use a 1% resistor for RILIM. In case RILIM is not connected, the IC uses an internal default current-limit threshold.
Loop Compensation
The loop is compensated using a feedback network around the error amplifier. Figure 22 shows a complete type-3 compensation network. For type-2 compensation, eliminate R3 and C3.
L=
(4)
where f is the oscillator frequency.
Setting the Ramp Resistor Value
The internal ramp voltage excursion (VRAMP) during tON should be set to 0.6V at nominal operating point. RRAMP is approximately: RRAMP ( K ) = 18 x10 - 6 * VIN * f (VIN - 1.8) * VOUT -2 (5)
Figure 22. Compensation Network
where frequency (f) is expressed in KHz.
Setting the Current Limit
There are two levels of current-limit thresholds in FAN2108. The first level of protection is through an internal default limit set at the factory to limit output current beyond normal usage levels. The second level of protection is externally settable at the ILIM pin. Current-limit protection is enabled whenever the lower of the two thresholds is reached. FAN2108 uses its internal low-side MOSFET for current-sensing. The current-limit threshold voltage (VILIM) is compared to a scaled version of voltage drop across the low-side MOSFET, sampled at the end of each PWM offtime/cycle. The internal default threshold (with ILIM open) is temperature compensated. The ILIM pin can source a 10A current that can be used to establish a lower, temperature-dependent, current-limit threshold by connecting a resistor (RILIM) between ILIM and AGND. RILIM can be approximated with the equation:
RILIM(K) = 95 + 3 * I out * KT * K1 + Vout * 3.33 * 10 Rramp * fsw
6
Since the FAN2108 employs summing current-mode architecture, type-2 compensation can be used for many applications. For applications that require wide loop bandwidth and/or use very low-ESR output capacitors, type-3 compensation may be required.
Protection
The converter output is monitored and protected against extreme overload, short-circuit, over-voltage, under-voltage, and over-temperature conditions. An internal fault latch is set for any fault intended to shut down the IC. When the fault latch is set, the IC discharges VOUT by enhancing the low-side MOSFET until FB<0.25V. The MOSFET is not turned on again unless FB>0.5V. This behavior discharges the output without causing undershoot (negative output voltage).
Under-Voltage Shutdown
If voltage on the FB pin remains below the undervoltage threshold for 16 consecutive clock cycles, the fault latch is set and the converter shuts down. This protection is not active until the internal SS ramp reaches 1.0V during soft-start.
(6)
where: I = Desired current limit setpoint in Amps; KT = Normalized temperature coefficient of the low-side MOSFET (Q2 from Figure 8); K1 = Overload co-efficient (use 1.2 to 1.4); VOUT = Set output voltage; Rramp = Ramp resistor used in K; and fsw = Selected switching frequency in KHz. After 16 consecutive, pulse-by-pulse, current-limit cycles, the fault latch is set and the regulator shuts down. Cycling VCC or EN restores operation after a normal soft-start cycle (refer to Auto-Restart section).
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
Over-Voltage Protection / Shutdown
If voltage on the FB pin exceeds the over-voltage threshold for two consecutive clock cycles, the fault latch is set and shutdown occurs. A shorted high-side MOSFET condition is detected when SW voltage exceeds ~0.7V while the low-side MOSFET is fully enhanced. The fault latch is set immediately upon detection. The two fault protection circuits above are active all the time, including during soft-start.
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Auto-Restart
After a fault, EN pin is discharged by a 1A current sink to a 1.1V threshold before the internal 800K pull-up is restored. A new soft-start cycle begins when EN charges above 1.35V. Depending on the external circuit, the FAN2108 can be configured to remain latched-off or to automatically restart after a fault.
Table 1. Fault / Restart Configurations
Over-Temperature Protection (OTP)
The chip incorporates an over-temperature protection circuit that sets the fault latch when a die temperature of about 150C is reached. The IC restarts when the die temperature falls below 125C.
Power-Good (PGOOD) Signal
PGOOD is an open-drain output that asserts LOW when VOUT is out of regulation, as measured at the FB pin. Thresholds are specified in the Electrical Specifications section. PGOOD does not assert HIGH until the fault latch is enabled (T1.0).
EN Pin
Pull to GND Pull-up to VCC with 100K Open Cap. to GND
Controller / Restart State
OFF (Disabled) No Restart - Latched OFF(After VCC Comes Up) Immediate Restart After Fault New Soft-Start Cycle After: tDELAY (ms)=3.9 * C(nf)
PCB Layout
With EN is left open, restart is immediate. If auto-restart is not desired, tie the EN pin to the VCC pin or pull it HIGH after VCC comes up with a logic gate to keep the 1A current sink from discharging EN to 1.1V. Figure 23 shows one method to pull up EN to VCC for a latch configuration. 15 VCC 100K
FAN2108
Figure 24. Recommended PCB Layout
14 EN
3.3n
Figure 23. Enable Control with Latch Option
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
Physical Dimensions
2X
TOP VIEW
2X RECOMMENDED LAND PATTERN ALL VALUES TYPICAL EXCEPT WHERE NOTED
SIDE VIEW
SEATING PLANE
A) DIMENSIONS ARE IN MILLIMETERS. B) DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) DESIGN BASED ON JEDEC MO-220 VARIATION WJHC E) TERMINALS ARE SYMMETRICAL AROUND THE X & Y AXIS EXCEPT WHERE DEPOPULATED. F) DRAWING FILENAME: MKT-MLP25AREV2
BOTTOM VIEW
Figure 25. 5x6mm Molded Leadless Package (MLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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FAN2108 -- TinyBuckTM, 3-24V Input, 8A, High-Efficiency, Integrated Synchronous Buck Regulator
(c) 2008 Fairchild Semiconductor Corporation FAN2108 * Rev. 1.0.0
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